level 1
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
entity Digital_Clock is
Port ( clk : in STD_LOGIC;
rst : in STD_LOGIC;
S0 : in STD_LOGIC;
S1 : in STD_LOGIC;
LED : out STD_LOGIC_VECTOR (3 downto 0));
end Digital_Clock;
architecture Behavioral of Digital_Clock is
signal hour_sel : std_logic;
signal min_sel : std_logic;
signal hour : integer range 0 to 23 := 0;
signal min : integer range 0 to 59 := 0;
signal sec : integer range 0 to 59 := 0;
begin
process(clk, rst)
begin
if (rst = '1') then
hour <= 0;
min <= 0;
sec <= 0;
hour_sel <= '0';
min_sel <= '0';
elsif (rising_edge(clk)) then
if (sec = 59) then
sec <= 0;
if (min = 59) then
min <= 0;
if (hour = 23) then
hour <= 0;
else
hour <= hour + 1;
end if;
else
min <= min + 1;
end if;
else
sec <= sec + 1;
end if;
if (S0 = '1') then
hour_sel <= not hour_sel;
min_sel <= '0';
elsif (S1 = '1') then
if (hour_sel = '1') then
hour <= hour + 1;
else
min <= min + 1;
end if;
end if;
end if;
end process;
process(hour, min, sec, hour_sel, min_sel)
begin
if (hour_sel = '1') then
LED <= std_logic_vector(to_unsigned(hour, 4));
else
LED <= std_logic_vector(to_unsigned(min, 4));
end if;
end process;
process(hour, min, sec)
begin
if (sec = 0 and rising_edge(clk)) then
LED <= std_logic_vector(to_unsigned(2, 4)); -- 整点报时信号,控制LED闪烁
wait for 1 second; -- 等待1秒
2023年06月26日 11点06分