要求：1、红、绿、黄发光二极管作信号灯，用传感器或逻辑开关作检测车辆是否到来的信号，实验电路用逻辑开关代替。
2、主干道处于常允许通行的状态，支干道有车来时才允许通行。主干道亮绿灯时，支干道亮红灯；支干道亮绿灯时，主干道亮红灯。
3、主、支干道均有车时，两者交替允许通行，主干道每次放行45秒，支干道每次放行25秒，设立45秒、25秒计时、显示电路，选择1HZ时钟脉冲作为系统时钟。
4、在每次由绿灯亮到红灯亮的转换过程中，要亮5秒黄灯作为过渡，使行驶中的车辆有时间停到禁行线外，设立5秒计时、显示电路。（未完待续）


二、XSKZ
根据EN45、EN25、EN05M、EN05B的信号以及3个倒计时计数器的计数状态决定输出3个倒计时计数器中某个的状态输出。
原理图模块：
设计源程序：
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY XSKZ IS
   PORT(EN45,EN25,EN05M,EN05B: IN STD_LOGIC;
     AIN45M,AIN45B,AIN25M,AIN25B,AIN05: IN STD_LOGIC_VECTOR(7 downto 0);
    DOUTB,DOUTM: OUT STD_LOGIC_VECTOR(7 downto 0));
END   ENTITY XSKZ;
ARCHITECTURE ART OF XSKZ IS
SIGNAL A :STD_LOGIC_VECTOR (3 DOWNTO 0);
begin
   A<= EN45&EN25&EN05M&EN05B;
PROCESS(A) IS
BEGIN
   CASE A IS
WHEN"1000"=>DOUTM<=AIN45M;DOUTB<=AIN45B;
   WHEN"1010"=>DOUTM<=AIN05;DOUTB<=AIN05;
   WHEN"0100"=>DOUTM<=AIN25M;DOUTB<=AIN25B;
   WHEN"0101"=>DOUTM<=AIN05;DOUTB<=AIN05;
   WHEN OTHERS=>DOUTM<="00000000";DOUTB<="00000000";
END CASE ;
END PROCESS;
END ARCHITECTURE ART;设计仿真的截图：


三、CNT45S
      CLK上升沿到来时，若到计时使能信号和SB信号有效，CNT45S开始计数，并将输入状态通过DOUT45M、DOUT45B分别输出到主、支干道显示。
     设计的原理图模块：
      
       设计源程序：
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY CNT45S IS
   PORT(SB,CLK,EN45:IN STD_LOGIC;
        DOUT45M,DOUT45B:OUT STD_LOGIC_VECTOR(7 DOWNTO 0));
END CNT45S;
ARCHITECTURE ART OF CNT45S IS
SIGNAL CNT6B:STD_LOGIC_VECTOR(5 DOWNTO 0);
BEGIN
PROCESS(SB,CLK,EN45) IS
BEGIN
IF SB='0' THEN CNT6B<=CNT6B-CNT6B-1;
    ELSIF(CLK'EVENT AND CLK='1')THEN
     IF EN45='1'THEN CNT6B<=CNT6B+1;
      ELSIF EN45='0'THEN   CNT6B<=CNT6B-CNT6B-1;
   END IF;
END IF;
END PROCESS;
PROCESS(CNT6B)IS
BEGIN
CASE CNT6B IS
WHEN"000000"=>DOUT45M<="01000101";DOUT45B<="01010000";
WHEN"000001"=>DOUT45M<="01000100";DOUT45B<="01001001";
WHEN"000010"=>DOUT45M<="01000011";DOUT45B<="01001000";
WHEN"000011"=>DOUT45M<="01000010";DOUT45B<="01000111";
WHEN"000100"=>DOUT45M<="01000001";DOUT45B<="01000110";
WHEN"000101"=>DOUT45M<="01000000";DOUT45B<="01000101";
WHEN"000110"=>DOUT45M<="00111001";DOUT45B<="01000100";
WHEN"000111"=>DOUT45M<="00111000";DOUT45B<="01000011";
WHEN"001000"=>DOUT45M<="00110111";DOUT45B<="01000010";
WHEN"001001"=>DOUT45M<="00110110";DOUT45B<="01000001";
WHEN"001010"=>DOUT45M<="00110101";DOUT45B<="01000000";
WHEN"001011"=>DOUT45M<="00110100";DOUT45B<="00111001";
WHEN"001100"=>DOUT45M<="00110011";DOUT45B<="00111000";
WHEN"001101"=>DOUT45M<="00110010";DOUT45B<="00110111";
WHEN"001110"=>DOUT45M<="00110001";DOUT45B<="00110110";
WHEN"001111"=>DOUT45M<="00110000";DOUT45B<="00110101";
WHEN"010000"=>DOUT45M<="00101001";DOUT45B<="00110100";
WHEN"010001"=>DOUT45M<="00101000";DOUT45B<="00110011";
WHEN"010010"=>DOUT45M<="00100111";DOUT45B<="00110010";
WHEN"010011"=>DOUT45M<="00100110";DOUT45B<="00110001";
WHEN"010100"=>DOUT45M<="00100101";DOUT45B<="00110000";
WHEN"010101"=>DOUT45M<="00100100";DOUT45B<="00101001";
WHEN"010110"=>DOUT45M<="00100011";DOUT45B<="00101000";
WHEN"010111"=>DOUT45M<="00100010";DOUT45B<="00100111";
WHEN"011000"=>DOUT45M<="00100001";DOUT45B<="00100110";
WHEN"011001"=>DOUT45M<="00100000";DOUT45B<="00100101";
WHEN"011010"=>DOUT45M<="00011001";DOUT45B<="00100100";
WHEN"011011"=>DOUT45M<="00011000";DOUT45B<="00100011";
WHEN"011100"=>DOUT45M<="00010111";DOUT45B<="00100010";
WHEN"011101"=>DOUT45M<="00010110";DOUT45B<="00100001";
WHEN"011110"=>DOUT45M<="00010101";DOUT45B<="00100000";
WHEN"011111"=>DOUT45M<="00010100";DOUT45B<="00011001";
WHEN"100000"=>DOUT45M<="00010011";DOUT45B<="00011000";
WHEN"100001"=>DOUT45M<="00010010";DOUT45B<="00010111";
WHEN"100010"=>DOUT45M<="00010001";DOUT45B<="00010110";
WHEN"100011"=>DOUT45M<="00010000";DOUT45B<="00010101";
WHEN"100100"=>DOUT45M<="00001001";DOUT45B<="00010100";
WHEN"100101"=>DOUT45M<="00001000";DOUT45B<="00010011";
WHEN"100110"=>DOUT45M<="00000111";DOUT45B<="00010010";
WHEN"100111"=>DOUT45M<="00000110";DOUT45B<="00010001";
WHEN"101000"=>DOUT45M<="00000101";DOUT45B<="00010000";
WHEN"101001"=>DOUT45M<="00000100";DOUT45B<="00001001";
WHEN"101010"=>DOUT45M<="00000011";DOUT45B<="00001000";
WHEN"101011"=>DOUT45M<="00000010";DOUT45B<="00000111";
WHEN"101100"=>DOUT45M<="00000001";DOUT45B<="00000110";
WHEN OTHERS=>DOUT45M<="00000000";DOUT45B<="00000000";
END CASE;
END PROCESS;
END;


太长了，没发完，加我qq:513926306

4、CNT25S
CLK上升沿到来时，若到计时使能信号、SM信号和SB信号有效，CNT25S开始计数，并将输入状态通过DOUT25M、DOUT25B分别输出到主、支干道显示。
设计的原理图模块：
设计源程序：
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY CNT25S IS
   PORT(SB,SM,CLK,EN25:IN STD_LOGIC;
        DOUT25M,DOUT25B:OUT STD_LOGIC_VECTOR(7 DOWNTO 0));
END ENTITY CNT25S;
ARCHITECTURE ART OF CNT25S IS
    SIGNAL CNT5B:STD_LOGIC_VECTOR(4 DOWNTO 0);
    BEGIN
PROCESS(SB,SM,CLK,EN25)IS
BEGIN
IF SB='0'THEN CNT5B<=CNT5B-CNT5B-1;
     ELSIF SM='0'THEN CNT5B<=CNT5B-CNT5B-1;
      ELSIF(CLK'EVENT AND CLK='1')THEN
        IF EN25='1'THEN CNT5B<=CNT5B+1;
          ELSIF EN25='0'THEN CNT5B<=CNT5B-CNT5B-1;
        END IF;
      END IF;
   END PROCESS;
PROCESS(CNT5B)IS
   BEGIN
   CASE CNT5B IS
   WHEN"00000"=>DOUNT25B<="00100101";DOUT25M<="00110000";
   WHEN"00001"=>DOUNT25B<="00100100";DOUT25M<="00101001";
   WHEN"00010"=>DOUNT25B<="00100011";DOUT25M<="00101000";
   WHEN"00011"=>DOUNT25B<="00100010";DOUT25M<="00100111";
   WHEN"00100"=>DOUNT25B<="00100001";DOUT25M<="00100110";
   WHEN"00101"=>DOUNT25B<="00100000";DOUT25M<="00100101";
   WHEN"00110"=>DOUNT25B<="00011001";DOUT25M<="00100100";
   WHEN"00111"=>DOUNT25B<="00011000";DOUT25M<="00100011";
   WHEN"01000"=>DOUNT25B<="00010111";DOUT25M<="00100010";
   WHEN"01001"=>DOUNT25B<="00010110";DOUT25M<="00100001";
   WHEN"01010"=>DOUNT25B<="00010101";DOUT25M<="00100000";
   WHEN"01011"=>DOUNT25B<="00010100";DOUT25M<="00011001";
   WHEN"01100"=>DOUNT25B<="00010011";DOUT25M<="00011000";
   WHEN"01101"=>DOUNT25B<="00010010";DOUT25M<="00010111";
   WHEN"01110"=>DOUNT25B<="00010001";DOUT25M<="00010110";
   WHEN"01111"=>DOUNT25B<="00010000";DOUT25M<="00010101";
   WHEN"10000"=>DOUNT25B<="00001001";DOUT25M<="00010100";
   WHEN"10001"=>DOUNT25B<="00001000";DOUT25M<="00010011";
   WHEN"10010"=>DOUNT25B<="00000111";DOUT25M<="00010010";
   WHEN"10011"=>DOUNT25B<="00000110";DOUT25M<="00010001";
   WHEN"10100"=>DOUNT25B<="00000101";DOUT25M<="00010000";
   WHEN"10101"=>DOUNT25B<="00000100";DOUT25M<="00001001";
   WHEN"10110"=>DOUNT25B<="00000011";DOUT25M<="00001000";
   WHEN"10111"=>DOUNT25B<="00000010";DOUT25M<="00000111";


   WHEN"11000"=>DOUNT25B<="00000001";DOUT25M<="00000110";
   WHEN OTHERS=>DOUNT25B<="00000000";DOUT25M<="00000000";
END CASE;
END PROCESS;
END;
设计仿真的截图：
5、CNT05S
简单思路：CLK上升沿到来时，若到计时使能信号有效，CNT25S开始计数，并将输入状态通过DOUT05输出到主、支干道显示。
设计的原理图模块：
设计源程序
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY CNT05S IS
PORT(CLK,EN05M,EN05B:IN STD_LOGIC;
      DOUT5:OUT STD_LOGIC_VECTOR(7 DOWNTO 0));
END CNT05S;
ARCHITECTURE ART OF CNT05S IS
SIGNAL CNT3B:STD_LOGIC_VECTOR(2 DOWNTO 0);
BEGIN
PROCESS(CLK,EN05M,EN05B)IS
BEGIN
IF(CLK'EVENT AND CLK='1')THEN
   IF EN05M='1'THEN CNT3B<=CNT3B+1;
    ELSIF EN05B='1'THEN CNT3B<=CNT3B+1;
    ELSIF EN05B='0'THEN CNT3B<=CNT3B-CNT3B-1;
   END IF;
END IF;
END PROCESS;
PROCESS(CNT3B)
BEGIN
CASE CNT3B IS
WHEN"000"=>DOUT5<="00000101";
WHEN"001"=>DOUT5<="00000100";
WHEN"010"=>DOUT5<="00000011";
WHEN"011"=>DOUT5<="00000010";
WHEN"100"=>DOUT5<="00000001";
WHEN OTHERS=>DOUT5<="00000000";
END CASE;
END PROCESS;
END;
设计仿真的截图：
6、YMQ
七段译码显示器，输出0～9的数据在显示屏上。       
设计的原理图模块：
设计源程序
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
    ENTITY YMQ IS  
PORT(AIN4:IN STD_LOGIC_VECTOR(3 DOWNTO 0);       
DOUT7: OUT STD_LOGIC_VECTOR(6 DOWNTO 0));
END ENTITY YMQ;
ARCHITECTURE ART OF YMQ IS   
BEGIN   
PROCESS(AIN4) IS     
BEGIN
CASE AIN4 IS     
WHEN "0000"=>DOUT7<="0111111";     
WHEN "0001"=>DOUT7<="0000110";     
WHEN "0010"=>DOUT7<="1011011";     
WHEN "0011"=>DOUT7<="1001111";     
WHEN "0100"=>DOUT7<="1100110";     
WHEN "0101"=>DOUT7<="1101101";
WHEN "0110"=>DOUT7<="1111101";     
WHEN "0111"=>DOUT7<="0000111";     
WHEN "1000"=>DOUT7<="1111111";     
WHEN "1001"=>DOUT7<="1101111";     
WHEN OTHERS=>DOUT7<="0000000";     
END CASE;   
END PROCESS;
END ARCHITECTURE ART;