请问这个程序错在哪里啊，运行出来有好多错误，😟😟😟交通灯控制模块的VHDL源程序(SR.VHD)
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
ENTITY LIGHT IS
PORT(SRED: OUT STD_LOGIC;
SGREEN: OUT STD_LOGIC;
ERED: OUT STD_LOGIC;
EGREEN: OUT STD_LOGIC;
EYELLOW: OUT STD_LOGIC;
GT_SET: IN STD_LOGIC;
GHUMAN_TIME: IN INTEGER RANGE 31 DOWNTO 0;
GHUMAN_CLKT: IN INTEGER RANGE 31 DOWNTO 0;
GVEHICLE_TIME: IN INTEGER RANGE 31 DOWNTO 0;
REQUEST: IN STD_LOGIC;
CLK: IN STD_LOGIC;
RST: IN STD_LOGIC);
END LIGHT;
ARCHITECTURE BEHAVE OF LIGHT IS
TYPE IN_STATES IS (ST0,ST1,ST2,ST3,ST4);
SIGNAL CURRENT_STATE: IN_STATES;
SIGNAL NEXT_STATE: IN_STATES;
SIGNAL START: STD_LOGIC;
SIGNAL SIG: INTEGER RANGE 31 DOWNTO 0;
BEGIN
PROCESS(CURRENT_STATE,RST)
BEGIN
IF(RST='1' OR CURRENT_STATE = ST0)THEN
START<='0';
ELSE
START<='1';
END IF;
END PROCESS;
A:PROCESS(START,CLK)
BEGIN
IF(RST='1')THEN
SIG<=0;
ELSIF(CLK'EVENT AND CLK='1')THEN
IF(START='1')THEN
IF(SIG=GVEHICLE_TIME)THEN
SIG<=0;
ELSE
SIG<=SIG+1;
END IF;
ELSE
SIG<=0;
END IF;
END IF;
END PROCESS A;
PROCESS(RST,CLK)
BEGIN
IF(RST='1')THEN
CURRENT_STATE<=ST0;
ELSIF(CLK'EVENT AND CLK='1')THEN
CURRENT_STATE<=NEXT_STATE;
END IF;
END PROCESS;
PROCESS(CLK,CURRENT_STATE)
BEGIN
CASE CURRENT_STATE IS
WHEN ST0=> ERED<='0'; EGREEN<='1'; EYELLOW<='0';SRED<='1';SGREEN<='0';
IF(REQUEST='1' AND GT_SET='0')THEN
NEXT_STATE<=ST1;
ELSE
NEXT_STATE<=ST0;
END IF;
WHEN ST1=>ERED<='0';
EGREEN<='0'; EYELLOW<='1';SRED<='1';SGREEN<='0';
IF(SIG=1)THEN
NEXT_STATE<=ST2;
ELSE
NEXT_STATE<=ST1;
END IF;
WHEN ST2=> ERED<='1';
EGREEN<='0'; EYELLOW<='0';SRED<='0';SGREEN<='1';
IF(SIG=GHUMAN_TIME)THEN
NEXT_STATE<=ST3;
ELSE
NEXT_STATE<=ST2;
END IF;
WHEN ST3=> ERED<='1';
EGREEN<='0'; EYELLOW<='0';SRED<='0';SGREEN<=NOT CLK;
IF(SIG=GHUMAN_CLKT)THEN
NEXT_STATE<=ST4;
ELSE
NEXT_STATE<=ST3;
END IF;
WHEN ST4=> ERED<='0';
EGREEN<='1'; EYELLOW<='0';SRED<='1';SGREEN<='0';
IF(SIG=GVEHICLE_TIME)THEN
NEXT_STATE<=ST0;
ELSE
NEXT_STATE<=ST4;
END IF;
WHEN

求帮忙解答

你编译时它会告诉你错误在哪里的

**，一个文件就做出交通灯我做的交通灯分了几个模块，5个文件才做的出来