MIPS is one of the first RISC CPU architectures invented around 1985. It was a radical design which removed many features deemed unnecessary, since the goal was to get the best possible performance from a limited transistor count. Back then, MIPS were powerful general purpose CPUs, and very successful in that role, until they lost ground to systems based on cheap mass-produced Intel-compatible CPUs. Later on, the simple and elegant design allowed to create a wide range of low power CPUs targeted for embedded applications.
Today, MIPS is a popular architecture for embedded systems, with a strong presence in various networked devices.
Debian currently provides 3 ports, 'mips', 'mipsel', and 'mips64el'. The 'mips' and 'mipsel' ports are respectively big and little endian variants, using the O32 ABI with hardware floating point. They use the MIPS II ISA in Jessie and the MIPS32R2 ISA in Stretch/Sid. The 'mips64el' port is a 64-bit little endian port using the N64 ABI, hardware floating point and the MIPS64R2 ISA.
2F 彻底淘汰了

现在 mips32R2 mips64R2 是最低要求了
mips64 已经到 mipsR6 了

MIPS32/MIPS64
The 32-bit MIPS32 instruction set and the 64-bit MIPS64 instruction set were introduced in 1999.[10] MIPS32 is based on MIPS II with some additional features from MIPS III, MIPS IV, and MIPS V; MIPS64 is based on MIPS V.[10] NEC, Toshiba and SiByte (later acquired by Broadcom) each obtained licenses for the MIPS64 instruction set as soon as it was announced. Philips, LSI Logic, IDT, Raza Microelectronics, Inc., Cavium, Loongson Technology and Ingenic Semiconductor have since joined them.
MIPS32/MIPS64 Release 1
The first release of MIPS32, based on the MIPS II instruction set, added conditional moves, prefetch instructions, and other features from the R4000 and R5000 families of 64-bit processors.[10] The first release of MIPS64 adds a MIPS32 mode to run 32-bit code.[10] The MUL and MADD (multiply-add) instructions, previously available in some implementations, were added to the MIPS32 and MIPS64 specifications, as were cache control instructions.[10]
MIPS32/MIPS64 Release 5
Announced on December 6, 2012.[12]
MIPS32/MIPS64 Release 6
MIPS32/MIPS64 Release 6 in 2014 added[13] the following:

2f是r1对吧…

我的8089d啊

其实貌似也只有3A2000 及以后的U 支持mips64R2
3A1000 只支持mips64R1

MIPS32/MIPS64 Release 6
MIPS32/MIPS64 Release 6 in 2014 added[13] the following:
a new family of branches with no delay slot:
unconditional branches (BC) & branch-and-link (BALC) with a 26-bit offset,
conditional branch on zero/non-zero with a 21-bit offset,
full set of signed & unsigned conditional branches compare between two registers (e.g. BGTUC) or a register against zero (e.g. BGTZC),
full set of branch-and-link which compare a register against zero (e.g. BGTZALC).
index jump instructions with no delay slot designed to support large absolute addresses.
instructions to load 16-bit immediates at bit position 16, 32 or 48, allowing to easily generate large constants.
PC-relative load instructions, as well as address generation with large (PC-relative) offsets.
bit-reversal & byte-alignement instructions (previously only available with the DSP extension).
multiply & divide instructions redefined so that they use a single register for their result).
instructions generating truth values now generate all zeroes or all ones instead of just clearing/setting the 0-bit,
instructions using a truth value now only interpret all-zeroes as false instead of just looking at the 0-bit.
Removed infrequently used instructions:
some conditional moves
branch likely instructions (deprecated in previous releases).
integer overflow trapping instructions with 16-bit immediate
integer accumulator instructions (together HI/LO registers, moved to the DSP Application-Specific Extension)
unaligned load instructions (LWL & LWR), (requiring that most ordinary loads & stores support misaligned access, possibly via trapping and with the addition of a new instruction (BALIGN))
Reorganized the instruction encoding, freeing space for future expansions.

a new family of branches with no delay slot:
这个很牛逼呀，这是效率提升呀

勉强看懂…不过那个比特反转和字节对齐看起来很像适用于网络设备或者嵌入式的

反正看不懂，反正很牛逼，反正不接地气。
我觉得龙芯无所谓跟随外国，走自己的路子，反正现在linux是开源的，大不了自己维护一个分支，反正API都是兼容 POSIX的，怕毛！