哪位大神帮忙仿真下 感激不尽 ！！ 基于FPGA的m序列的 求仿真波形
Library IEEE ;
use IEEE.std_logic_1164.all ;
use IEEE.std_logic_arith.all ;
use ieee.std_logic_unsigned.all;
entity cc is
port(clk:in std_logic;
b:out std_logic_vector(0 to 3));
end cc;
architecture examp of cc is
component dff
port(d,clk:in std_logic;
q:out std_logic);
end component;
signal z:std_logic_vector(0 to 4);
begin
z(0)<=not(z(4)xor z(1));
g1:for i in 0 to 3 generate
dffx:dff port map(z(i),clk,z(i+1));
end generate;
b(0 to 3)<=not z(1 to 4);
end examp;