高通今天发布了2014财年第二财季财报。报告显示，高通第二财季净利润为19.6亿美元，比去年同期的18.7亿美元增长5%。

intel有移动板块的 大亏损，利润肯定不行了，将来就是 apple的利润零头！

英特尔后悔死了

壮哉我通

你好
　　　--明明藏起来的小尾巴、还是被你看到啦(o^^o)♪

真是搞不清楚一些人总是捧Intel什么心态，核心显卡做的和渣一样，CPU这几年根本是原地踏步

ILP wall
ILP代表instruction level parallelism 指令级并行度。就是说乱序多发射已经很难很难往上做了
。
就是说在同等频率下，在可预见的未来，人类目前的单线程性能很难再有大的最显著的快速的改进， 只有缝缝补补 、小打小闹。因为因为越往上越难爬。微结构设计上拼的很多就是细节，其实大体的微结构要做成什么样子大家心里都有数。无论ARM，Intel还是AMD，IBM，乱序执行的主要框架都是上世纪六七十年代发展起来的tomasulo算法。

ILP wall跟power wall一样，已经不算是一种正在建立的理论，而是已经成了公认的既定事实，已经写进教科书了。
小白 还在幻想intel下一代大改进单线程？？？？？？哈哈哈

http://www.edn.com/design/systems-design/4368983/Future-of-computing--Part-3-The-ILP-Wall-and-pipelines
What Does It All Mean?
The implementation of extensive CPU parallelism combined with Denard Scaling and Moore's Law process enhancement delivered nearly half a century of unprecedented productivity growth directly tied to computer performance.
However that parallelism has reached an impenetrable wall of logical complexity and power consumption that renders further improvement incremental at best and may actually cause execution speeds to regress.
The modern microprocessor era kicked off with the penetrating 1980 RISC processor analysis by Patterson and Dave Ditzel.10 The insights of that study directly led to the SPARC CPU and indirectly to MIPS, the Pentium, and all of its descendants.
However the latest edition of Patterson's book is definitely pessimistic:
"...the exploitation of ILP (instruction level parallelism) - namely, speculation - is inherently inefficient."
"...we have reached - and, in some cases, possibly even surpassed - the point of diminishing returns in our attempt to exploit ILP."
"...lower CPIs (clocks per instruction) are likely to lead to lower ratios of performance per watt, simple due to overhead."
"The complexities of implementing these capabilities is likely to mean sacrifices in the maximum clock rate."
"...the widest-issue processor...is the Itanium 2, but it also has the slowest clock rate, despite the fact that is consumes the most power!"
"...modern microprocessors are primarily power limited."
To be properly and profoundly depressed regarding the state of computing, an engineer must read the recent works of Patterson, Kogge, Sterling, Dobberpuhl, Moore, Yelick, Colwell, or the several hundred or so lesser lights. These are some of the smartest individuals of the planet, and they essentially predict the end of computer improvement.
Patterson said it best in his recent interview with the New York Times regarding yet another dismal study. "I’m pretty sure it means we need to innovate, since we don’t want to die!"

The implementation of extensive CPU parallelism combined with Denard Scaling and Moore's Law process enhancement delivered nearly half a century of unprecedented productivity growth directly tied to computer performance.
However that parallelism has reached an impenetrable wall of logical complexity and power consumption that renders further improvement incremental at best and may actually cause execution speeds to regress.
CPU的并行化设计（乱序多发射）带来了半个世界的计算机性能大增长（生产力大增）。但是， 这种并行化机制遇到了不可逾越的墙--逻辑的复杂性和功耗，导致如果继续 增强乱序多发射会让性能反而降低。
通俗来讲，如果你搞个乱序10发射，导致CPU 的复杂度猛增，功耗猛增，到头来还不如之前的性能。 安腾的宽度是最宽的，却也是频率最低的。安腾就是撞死在ILP墙上的， 酷睿目前是贴在ILP墙上动弹不得，只能依靠越来越昂贵的制程来提升一些频率，其结构很难再有大的改善。

毫无悬念。
　-- 高端大气上档次，低调奢华有内涵。

活该电脑CPU 不降价 更新换代提升又小的可怜

农企的核显不弱吧！对比淫特尔的

为什么给某些2 B扫扫盲，
http://wenwen.sogou.com/z/q131723504.htm
我在2010年的时候一直是用黑莓手机，其界面有个“关机”选项（ 也有休眠选项），“关机”了之后，也在继续耗电。若想彻底不耗电只能拔电池。所以，黑莓手机关机也耗电。
http://www.52blackberry.com/thread-686867-1-1.html?_dsign=8d9fff49

http://bbs.maxpda.com/thread-313449-1-1.html

赚折磨多 难怪被欲加之罪

http://www.anandtech.com/show/7961/apple-q2-2014-fiscal-results
apple的本季度利润为100 亿美金，什么MS ，intel 高通 加起来都不是对手啊。哈哈
ipad的收入连续超过mac机，可见x86在apple的财政和心目中不重要啊。

ARM确实是小公司，但厉害也就厉害在是个小公司，只卖芯片设计的授权自己赚小钱，大家赚大钱，将一帮大佬整合进ARM架构的产业链里。如果说intel是大象，那ARM就是小蚂蚁，高通就是羚羊。