要实现的功能是 4X4按键显示，可以进行简单的加减法。
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library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity jp1 is port(clk : in std_logic;
hang : buffer std_logic_vector(3 downto 0);
lie : in std_logic_vector(3 downto 0);
dout : out std_logic_vector(7 downto 0));
end jp1;
architecture atr of jp1 is
signal clk1 : std_logic_vector(4 downto 0);
signal fh : std_logic;--加减法判断
signal dh : std_logic;--等号判断
signal ansr : std_logic_vector(7 downto 0);
signal dout1 : std_logic_vector(7 downto 0);
signal int1 : std_logic_vector(7 downto 0);
signal int2 : std_logic_vector(7 downto 0);begin
process (clk)
begin
if clk'event and clk='1' then
if clk1=11111 then clk1<="000000";
else clk1<=clk1+1;
end if;
end if;
end process;
process (clk1)
begin
case clk1 is
when "00100"=>hang<="1110";
when "01000"=>hang<="1101";
when "01100"=>hang<="1011";
when "10000"=>hang<="0111";
when others=>hang<="0000";
end case;end process;
process(hang)
begin
jg : loop
case hang is
when "1110"=>
case lie is
when "1110"=>dout1<="11111111";
when "1101"=>fh<='0';--减法
when "1011"=>dout1<="01000000";--0
when "0111"=>dout1<="11111111";
when others=>null;
end case;
when "1101"=>
case lie is
when "1110"=>dh<='1';--等于
when "1101"=>dout1<="00110000";--3
when "1011"=>dout1<="00100100";--2
when "0111"=>dout1<="01111001";--1
when others=>null;
end case;
when "1011"=>
case lie is
when "1110"=>fh<='1';--加法
when "1101"=>dout1<="00000010";--6
when "1011"=>dout1<="00010010";---5
when "0111"=>dout1<="00011001";---4
when others=>null;
end case;
when "0111"=>
case lie is
when "1110"=>dout1<="11111111";
when "1101"=>dout1<="00010000";---9
when "1011"=>dout1<="00000000";---8
when "0111"=>dout1<="01111000";---
7when others=>null;
end case;
when others=>null;
end case;
if fh=0 or 1 then int2<=dout1;
else int1<=dout1;
end if;
exit jg when dh<=1;
end loop jg;
if fh=1 then ansr<=int1-int2;
else if fh=0 then ansr<=int1+int2;
end if;end if;
dout1<=ansr;end process;
process(clk)
begin
dout<=dout1;
end process；
end atr；