LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL;USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY CNT60 IS PORT (CLK,RST,EN : IN STD_LOGIC; CQL: OUT STD_LOGIC_VECTOR(3 DOWNTO 0); CQH: OUT STD_LOGIC_VECTOR(3 DOWNTO 0); COUT1 : OUT STD_LOGIC); END CNT60;ARCHITECTURE behav OF CNT60 ISSIGNAL CQI0: STD_LOGIC_VECTOR (3 DOWNTO 0);SIGNAL CQI1: STD_LOGIC_VECTOR (3 DOWNTO 0);SIGNAL COUT0 : STD_LOGIC; BEGIN PROCESS(CLK,RST,EN) BEGINIF RST='1' THEN CQI0 <=(OTHERS =>'0');ELSIF CLK'EVENT AND CLK='1' THENIF EN ='1' THENIF CQI0 <9 THEN CQI0 <=CQI0+1;ELSE CQI0 <=(OTHERS=>'0');END IF;END IF;IF CQI0 = 9 THEN COUT0 <= '1';ELSE COUT0<='0';END IF;END IF;END PROCESS;CQL<=CQI0;PROCESS(COUT0,RST) BEGINIF RST='1' THEN CQI1 <=(OTHERS =>'0');ELSIF COUT0'EVENT AND COUT0='1' THENIF CQI1<5 THEN CQI1<=CQI1+1;ELSE CQI1<=(OTHERS=>'0');END IF;IF CQI1=5 AND CQI0=9 THEN COUT1<='1';ELSE COUT1<='0';END IF;END IF;END PROCESS;CQH<=CQI1;END behav;
代码是这样的 但是我的图是这样的


我知道是参数设置的问题 但是怎么设置呢?