a13251195的个人资料 - RAT

a13251195 a13251195

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请大神看看是不是镜头出问题了。如图，手机拍的，KR的镜头。放大看里面貌似是破裂的，大家看看是不是？

Verilog转换VHDL，求帮忙。一个Verilog程序，需要转化为VHDL，求帮忙转下。 module keyinput ( input wire clk, input wire rst, input wire [3:0] row, output reg [3:0] col, output reg [7:0] qout, output reg [2:0] sel, output reg cs, output reg beep, output reg led, input wire setpsw, input unlock ); reg [7:0] keypad = 8'h00; reg [4:0] keycode = 5'h10; reg [3:0] keystate1 = 4'hf; reg [3:0] keystate2 = 4'hf; reg keypressdone = 1'b1; reg [4:0] keycode1 = 5'h10; reg [4:0] keycode2 = 5'h10; reg [4:0] keycode3 = 5'h10; reg [3:0] row1; reg [3:0] row2; reg [3:0] row3; reg [4:0] ledmsk = 5'h0; reg [15:0] lednum = 16'h0000; reg [1:0] dotpint = 2'd0; reg [15:0] psw=16'h1316; reg [27:0] cnt = 28'd0; reg pswflag=0; reg [4:0]pswcnt=0; reg temp1=1; reg temp2=1; reg temp3=1; reg temp4=1; always @ (posedge clk) cnt = cnt + 1'b1; always @ (posedge clk) cs=1; always @ (posedge cnt[20]) begin beep =1; case (col[3:0]) 4'b1110: col[3:0] <= 4'b1101; 4'b1101: col[3:0] <= 4'b1011; 4'b1011: col[3:0] <= 4'b0111; 4'b0111: col[3:0] <= 4'b1110; default: col[3:0] <= 4'b1110; endcase keypad[7:4] = row[3:0]; keypad[3:0] = col[3:0]; case (keypad[7:0]) 8'b11101110: keycode[4:0] = 5'h0; 8'b11101101: keycode[4:0] = 5'h4; 8'b11101011: keycode[4:0] = 5'h8; 8'b11100111: keycode[4:0] = 5'hc; 8'b11011110: keycode[4:0] = 5'h1; 8'b11011101: keycode[4:0] = 5'h5; 8'b11011011: keycode[4:0] = 5'h9; 8'b11010111: keycode[4:0] = 5'hd; 8'b10111110: keycode[4:0] = 5'h2; 8'b10111101: keycode[4:0] = 5'h6; 8'b10111011: keycode[4:0] = 5'ha; 8'b10110111: keycode[4:0] = 5'he; 8'b01111110: keycode[4:0] = 5'h3; 8'b01111101: keycode[4:0] = 5'h7; 8'b01111011: keycode[4:0] = 5'hb; 8'b01110111: keycode[4:0] = 5'hf; default: keycode[4:0] = 5'h10; endcase if(rst) begin keycode1<=keycode; keycode2<=keycode1; keycode3<=keycode2; row1 <= row; row2<= row1; row3<=row2; if((row3 < 4'b1111)&&(row2 == 4'b1111)&&(row1==4'b1111)&&(row == 4'b1111)) begin if(keycode3 != keycode)//&& (keycode2 == keycode3)) begin lednum[15:0] = lednum[15:0] << 4; lednum[3:0] = keycode3[3:0]; end end end else begin lednum[15:0]=16'h0000; pswflag=0; led=0; end temp1<=unlock; temp2<=temp1; temp3<=temp2; temp4<=temp3; if({temp4,temp3,temp2,temp1}==4'b1100) begin if(lednum==psw) begin led=1; pswflag=1; pswcnt<=0; end else begin led=0; pswcnt<=pswcnt+1; end end if(pswflag==1) begin if(!setpsw) begin psw=lednum; pswflag=0; end end if(pswcnt>=3) beep=0; end always @ (negedge cnt[16]) begin case (sel) default: begin sel = 3'b111; ledmsk[3:0] = lednum[3:0]; qout[7] = 1'b0; end 3'b100: begin sel = 3'b111; ledmsk[3:0] = lednum[3:0]; end 3'b111: begin sel = 3'b110; ledmsk[3:0] = lednum[7:4]; qout[7] = 1'b0; end 3'b110: begin sel = 3'b101; ledmsk[3:0] = lednum[11:8]; qout[7] = 1'b0; end 3'b101: begin sel = 3'b100; ledmsk[3:0] = lednum[15:12]; qout[7] = 1'b0; end endcase case (ledmsk) 5'h0: qout[6:0] = 7'b0111111; 5'h1: qout[6:0] = 7'b0000110; 5'h2: qout[6:0] = 7'b1011011; 5'h3: qout[6:0] = 7'b1001111; 5'h4: qout[6:0] = 7'b1100110; 5'h5: qout[6:0] = 7'b1101101; 5'h6: qout[6:0] = 7'b1111101; 5'h7: qout[6:0] = 7'b0000111; 5'h8: qout[6:0] = 7'b1111111; 5'h9: qout[6:0] = 7'b1101111; 5'hA: qout[6:0] = 7'b1110111; 5'hB: qout[6:0] = 7'b1111100; 5'hC: qout[6:0] = 7'b0111001; 5'hD: qout[6:0] = 7'b1011110; 5'hE: qout[6:0] = 7'b1111001; 5'hF: qout[6:0] = 7'b1110001; default: qout[6:0] = 7'b0000000; endcase end endmodule

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